The present invention relates to ferroelectric mechanical memory devices. Ferroelectric memory devices reported in patent and scientific publications and that are available commercially, employ a ferroelectric capacitor that can be switched between at least two different non-volatile polarization states. The remanent polarization, i.e., data state, stored in the ferroelectric capacitor is determined by sensing the charge flow or voltage generated on an external circuit which is driven by the switching of the ferroelectric polarization. Typical memory cell architectures consist of 1) a ferroelectric capacitor in series with a transistor, known as a Ferroelectric RAM (FRAM), or 2) a ferroelectric capacitor placed on top and in series with the capacitor formed by the gate and gate-oxide of a MOSFET, which is commonly referred to as a ferroelectric FET (FEFET). The Ferroelectric RAM (FRAM) architecture case uses a sensing method that employs the memory array bitline as a charge sharing capacitor for sensing the charge generated during polarization switching (or non-switching) of the ferroelectric cell capacitor. The structure of the ferroelectric cell capacitor includes a ferroelectric material, such as lead zirconate titanate (PZT). Upon application of an electric field to the FRAM cell capacitor, the dipoles tend to align themselves with the field direction and retain their polarization state after removal of the electric field, which results in storage of one of two possible electric polarizations in each data storage cell; either binary “0”s and “1”s.